# ℹ️ Q & A Help Zone **URL:** https://community.aisler.net/c/help-zone/79.md [Latest](https://community.aisler.net/latest.md) · [Categories](https://community.aisler.net/categories.md) · [Tags](https://community.aisler.net/tags.md) --- ## [About the ℹ️ Q & A Help Zone category](https://community.aisler.net/t/about-the-q-a-help-zone-category/2688)
**Author:** [@Sarah-from-AISLER](https://community.aisler.net/u/Sarah-from-AISLER)\ **Replies:** 0\ **Last updated:** [June 28, 2023, 1:08pm UTC](https://community.aisler.net/t/about-the-q-a-help-zone-category/2688 "2023-06-28T13:08:20Z")
Questions about designing your board or ordering with AISLER? Ask here, and our team or the community will help. What belongs here Design questions: design rules, stackups, vias, soldermask, stencils How our services w… --- ## [2 Layers 1.6mm 70µm Stackup Matierial Dielectric constant: height](https://community.aisler.net/t/2-layers-1-6mm-70-m-stackup-matierial-dielectric-constant-height/6093)
**Author:** [@Ronak-Shah](https://community.aisler.net/u/Ronak-Shah)\ **Replies:** 1\ **Last updated:** [October 14, 2026, 10:11am UTC](https://community.aisler.net/t/2-layers-1-6mm-70-m-stackup-matierial-dielectric-constant-height/6093 "2026-10-14T10:11:16Z")
Hello, What is FR4 material dielectric constant and height which will be used into standard 2 Layers 1.6mm 70µm Stackup? --- ## [Unwanted bridges in stencil](https://community.aisler.net/t/unwanted-bridges-in-stencil/5914)
**Author:** [@vj1](https://community.aisler.net/u/vj1)\ **Replies:** 1\ **Last updated:** [September 29, 2026, 11:56am UTC](https://community.aisler.net/t/unwanted-bridges-in-stencil/5914 "2026-09-29T11:56:13Z")
Hi! I am about to order a board and stencil which are similar to a previous one (FZISXSJP). That previous one had an issue in the stencil i would like to avoid. The problematic pattern is: White: Outline, Blue: Co… --- ## [Stencil Size Specifiation Outdated?](https://community.aisler.net/t/stencil-size-specifiation-outdated/5899)
**Author:** [@Joel1](https://community.aisler.net/u/Joel1)\ **Replies:** 1\ **Last updated:** [September 21, 2026, 11:12am UTC](https://community.aisler.net/t/stencil-size-specifiation-outdated/5899 "2026-09-21T11:12:57Z")
Title: Prototype stencil top margin is 22.7 mm instead of the specified ≥ 25 mm? Hi, I measured one of my prototype stencils (order 2026-77271, board outline 68.73 × 53.49 mm) to build a 3D-printed registration jig aro… --- ## [DRC errors with built-in KiCAD 10 TO-92 footprints and Aisler simple 2 layer rules](https://community.aisler.net/t/drc-errors-with-built-in-kicad-10-to-92-footprints-and-aisler-simple-2-layer-rules/5830)
**Author:** [@vinzc](https://community.aisler.net/u/vinzc)\ **Replies:** 2\ **Last updated:** [September 16, 2026, 12:02pm UTC](https://community.aisler.net/t/drc-errors-with-built-in-kicad-10-to-92-footprints-and-aisler-simple-2-layer-rules/5830 "2026-09-16T12:02:03Z")
Hi. I’ve just switched to KiCAD and redesigned my latest gEDA project. I imported Aisler design rules for a simple 2 layer board (directory aisler-2-layer-simple-drc from Aisler KiCAD DRC package on Github https://codel… --- ## [Connecting GND on BQ27220YZFR DSBGA IC (0.5 mm pitch)](https://community.aisler.net/t/connecting-gnd-on-bq27220yzfr-dsbga-ic-0-5-mm-pitch/5794)
**Author:** [@Arvid1](https://community.aisler.net/u/Arvid1)\ **Replies:** 3\ **Last updated:** [September 10, 2026, 2:59pm UTC](https://community.aisler.net/t/connecting-gnd-on-bq27220yzfr-dsbga-ic-0-5-mm-pitch/5794 "2026-09-10T14:59:06Z")
The BQ27220YZFR is a BGA package with a fine-pitch of 0.5 mm between solder balls. According to the 4 Layer 35µm ENIG design rules, the minimum spacing between copper is 125 µm, with a minimum track width of also 125 µm.… --- ## [How does Smart Match work?](https://community.aisler.net/t/how-does-smart-match-work/5793)
**Author:** [@Timo2](https://community.aisler.net/u/Timo2)\ **Replies:** 3\ **Last updated:** [September 8, 2026, 12:31pm UTC](https://community.aisler.net/t/how-does-smart-match-work/5793 "2026-09-08T12:31:03Z")
Hey there, I’m trying to prepare a board for assembly and I wanted to try the Smart Match feature for resistors, but I’m not sure if it’s working as intended. I’m uploading a KiCad PCB via the website, which works fine.… --- ## [\[KiCad\] Project text variables in the cart project name](https://community.aisler.net/t/kicad-project-text-variables-in-the-cart-project-name/5725)
**Author:** [@Michael\_Mick3DIY](https://community.aisler.net/u/Michael_Mick3DIY)\ **Replies:** 1\ **Last updated:** [September 24, 2026, 5:22pm UTC](https://community.aisler.net/t/kicad-project-text-variables-in-the-cart-project-name/5725 "2026-09-24T17:22:49Z")
Hello Aisler Community ! I’m using KiCad (9.09) with some project text variables like ${PCB\_VERSION}… With the plugin PushForKiCad (last version from the Aisler repos.), my project name is now with ${…} :smile: It… --- ## [PCB panelization with KiCad & Kikit](https://community.aisler.net/t/pcb-panelization-with-kicad-kikit/5694)
**Author:** [@Michael\_Mick3DIY](https://community.aisler.net/u/Michael_Mick3DIY)\ **Replies:** 3\ **Last updated:** [July 2, 2026, 1:54pm UTC](https://community.aisler.net/t/pcb-panelization-with-kicad-kikit/5694 "2026-07-02T13:54:45Z")
Hi there ! :waving\_hand: I’m starting a new project with a custom rotary encoder PCB… A tiny one for a specific use in a control panel : I’m using KiCad 9 with the (excellent) Kikit plugin to make a “PCB panelizatio… --- ## [Is a completely copper-free inner layer acceptable in an AISLER 4-layer 1.6mm PCB?](https://community.aisler.net/t/is-a-completely-copper-free-inner-layer-acceptable-in-an-aisler-4-layer-1-6mm-pcb/5692)
**Author:** [@Ilia](https://community.aisler.net/u/Ilia)\ **Replies:** 1\ **Last updated:** [July 1, 2026, 8:42am UTC](https://community.aisler.net/t/is-a-completely-copper-free-inner-layer-acceptable-in-an-aisler-4-layer-1-6mm-pcb/5692 "2026-07-01T08:42:13Z")
I am designing a 4-layer capacitive trackpad based on Azoteq’s AZD068 recommendations. The intended stack-up is: F.Cu: sensing electrodes In1.Cu: intentionally no copper beneath the sensing area In2.Cu: ground plane B… --- ## [AISLER's KiCAD PCB processing does not respect KiCAD 10.0.0 "jumper support"](https://community.aisler.net/t/aislers-kicad-pcb-processing-does-not-respect-kicad-10-0-0-jumper-support/5688)
**Author:** [@Fridtjof](https://community.aisler.net/u/Fridtjof)\ **Replies:** 1\ **Last updated:** [June 30, 2026, 9:07am UTC](https://community.aisler.net/t/aislers-kicad-pcb-processing-does-not-respect-kicad-10-0-0-jumper-support/5688 "2026-06-30T09:07:35Z")
Hi! KiCAD 10.0.0 introduced “jumper support”, a way to mark circuit board pads as internally connected by the component to be placed there. This is a handy feature, for example when placing 4-legged push-buttons where t… --- ## [How do you verify whether an invoice payment was received?](https://community.aisler.net/t/how-do-you-verify-whether-an-invoice-payment-was-received/5685)
**Author:** [@William1](https://community.aisler.net/u/William1)\ **Replies:** 1\ **Last updated:** [June 22, 2026, 11:57am UTC](https://community.aisler.net/t/how-do-you-verify-whether-an-invoice-payment-was-received/5685 "2026-06-22T11:57:47Z")
This is my first time ordering from AISLER so I’m still new to the website. I created a quotation for my first order and received an invoice when the PCBs shipped. I am located in the USA and the invoice had some informa… --- ## [Can non-populated components be shipped?](https://community.aisler.net/t/can-non-populated-components-be-shipped/5637)
**Author:** [@Fulgencio](https://community.aisler.net/u/Fulgencio)\ **Replies:** 1\ **Last updated:** [September 17, 2026, 11:57am UTC](https://community.aisler.net/t/can-non-populated-components-be-shipped/5637 "2026-09-17T11:57:38Z")
Hello Aisler team, I’m working on a project with mainly SMD components and some TH. I would like to order the board and the assembly of SMD components, and solder the TH components manually myself. Is it possible to sti… --- ## [Allow to push to an existing project which isn't in sandbox folder](https://community.aisler.net/t/allow-to-push-to-an-existing-project-which-isnt-in-sandbox-folder/5621)
**Author:** [@Anja](https://community.aisler.net/u/Anja)\ **Replies:** 1\ **Last updated:** [September 22, 2026, 10:26am UTC](https://community.aisler.net/t/allow-to-push-to-an-existing-project-which-isnt-in-sandbox-folder/5621 "2026-09-22T10:26:20Z")
How can I use the “Push to Aisler” feature to add a new revision to an existing project that is located in a folder other than the Sandboy folder? --- ## [Aperture Adjustment Ratio](https://community.aisler.net/t/aperture-adjustment-ratio/5609)
**Author:** [@Joel](https://community.aisler.net/u/Joel)\ **Replies:** 4\ **Last updated:** [September 21, 2026, 11:14am UTC](https://community.aisler.net/t/aperture-adjustment-ratio/5609 "2026-09-21T11:14:02Z")
Under this link: Stencil Aperture Adjustment ambiguous data is provided. The text states the opening will be shrunk by (1-0.13)², but the image states it will be shrunk by (1-0.15)². Which one is the actual value being u… --- ## [FR4 TG 150 maximum reflow temperature](https://community.aisler.net/t/fr4-tg-150-maximum-reflow-temperature/5593)
**Author:** [@gvxx](https://community.aisler.net/u/gvxx)\ **Replies:** 1\ **Last updated:** [April 20, 2026, 11:54am UTC](https://community.aisler.net/t/fr4-tg-150-maximum-reflow-temperature/5593 "2026-04-20T11:54:33Z")
Hi, I have some boards, manufactured by Aisler, with PCB stackup 4 layer detailed as follow: 4 Copper layers, 1.6mm ENIG Surface Finish, 35um Copper Outer Layers PCB Color Green Silkscreen White The base material is … --- ## [Push to Aisler](https://community.aisler.net/t/push-to-aisler/5592)
**Author:** [@Peter1](https://community.aisler.net/u/Peter1)\ **Replies:** 4\ **Last updated:** [April 14, 2026, 8:00am UTC](https://community.aisler.net/t/push-to-aisler/5592 "2026-04-14T08:00:11Z")
With KiCAD 10.0 on macOS, the plugin Push to Aisler does not work. The small dialog stops at “generating manufacturing assets…”. The same file works with KiCAD 9.0.8 with the plugin. --- ## [Board with E test failures: which one?](https://community.aisler.net/t/board-with-e-test-failures-which-one/5582)
**Author:** [@dl8dtl](https://community.aisler.net/u/dl8dtl)\ **Replies:** 2\ **Last updated:** [April 2, 2026, 7:02pm UTC](https://community.aisler.net/t/board-with-e-test-failures-which-one/5582 "2026-04-02T19:02:01Z")
I’ve got an email that one out of 12 PCBs has experienced E test failures. How do I find which one it is? I cannot see any markers. --- ## [Push to Aisler: Icon not showing in KiCad 10 (AppImage, Linux)](https://community.aisler.net/t/push-to-aisler-icon-not-showing-in-kicad-10-appimage-linux/5581)
**Author:** [@Frank](https://community.aisler.net/u/Frank)\ **Replies:** 7\ **Last updated:** [September 22, 2026, 11:41am UTC](https://community.aisler.net/t/push-to-aisler-icon-not-showing-in-kicad-10-appimage-linux/5581 "2026-09-22T11:41:38Z")
I downloaded KiCad 10.0.0 as AppImage (on Debian Trixie) from the official download page and after that, installed KiCad Push to Aisler Plugin version 3.0.1 both from the Aisler plugin repository and also manually by zip… --- ## [Coplanar SE 50 Ohms trace](https://community.aisler.net/t/coplanar-se-50-ohms-trace/5578)
**Author:** [@thomas-perraton1-oca](https://community.aisler.net/u/thomas-perraton1-oca)\ **Replies:** 1\ **Last updated:** [September 29, 2026, 1:44pm UTC](https://community.aisler.net/t/coplanar-se-50-ohms-trace/5578 "2026-09-29T13:44:32Z")
Hello, I intend to use a 50 Ohms coplanar waveguide for a short 2.4GHz trace on a 1.6mm 4 layer board. Would you know finer sizings than what Saturn PCB can provide ? Many thanks. --- ## [Board-Level Shielding Techniques for Reducing EMI in PCB Design](https://community.aisler.net/t/board-level-shielding-techniques-for-reducing-emi-in-pcb-design/5575)
**Author:** [@user53](https://community.aisler.net/u/user53)\ **Replies:** 1\ **Last updated:** [September 7, 2026, 10:03am UTC](https://community.aisler.net/t/board-level-shielding-techniques-for-reducing-emi-in-pcb-design/5575 "2026-09-07T10:03:26Z")
Hi everyone, I’ve been working on PCB designs recently and came across challenges related to EMI (Electromagnetic Interference). I wanted to understand more about effective board level shielding techniques used in modern… --- ## [Bug in connection recognition](https://community.aisler.net/t/bug-in-connection-recognition/5566)
**Author:** [@dl8dtl](https://community.aisler.net/u/dl8dtl)\ **Replies:** 2\ **Last updated:** [March 23, 2026, 12:36pm UTC](https://community.aisler.net/t/bug-in-connection-recognition/5566 "2026-03-23T12:36:57Z")
It seems I’m stumbling across a bug in the way connections are recognized. The project above is the minimal reproducible example for it. It happens when defining a part that has SMD pads on both sides of the PCB but w… --- ## [Problem: 8-Layer Board gets recognised as 6-Layer board](https://community.aisler.net/t/problem-8-layer-board-gets-recognised-as-6-layer-board/5530)
**Author:** [@dennis-restle-liftro](https://community.aisler.net/u/dennis-restle-liftro)\ **Replies:** 2\ **Last updated:** [February 16, 2026, 2:56pm UTC](https://community.aisler.net/t/problem-8-layer-board-gets-recognised-as-6-layer-board/5530 "2026-02-16T14:56:18Z")
I use KiCad 9.0.5 and made a 10cm\*10cm PCB with the letters 1 2 3 4 5 6 7 8, one letter per layer. I used the provided 8-Layer example from Aisler as you can see in the name of the Project. F.Cu has the letter 1, in1.… --- ## [Is there a public API spec for Part service and assembly upload](https://community.aisler.net/t/is-there-a-public-api-spec-for-part-service-and-assembly-upload/5528)
**Author:** [@matmair](https://community.aisler.net/u/matmair)\ **Replies:** 2\ **Last updated:** [February 13, 2026, 8:29am UTC](https://community.aisler.net/t/is-there-a-public-api-spec-for-part-service-and-assembly-upload/5528 "2026-02-13T08:29:55Z")
Hi! Is there a public API spec/docs for the API that was announced with Our Part Service is now in public beta (+ we've added Support for Arrow) ? I did not find any other mention on this forum and would like to look int… --- ## [Via plugging/filling + via drill vs. via size](https://community.aisler.net/t/via-plugging-filling-via-drill-vs-via-size/5522)
**Author:** [@hardware-altavo-eu](https://community.aisler.net/u/hardware-altavo-eu)\ **Replies:** 1\ **Last updated:** [February 4, 2026, 11:39am UTC](https://community.aisler.net/t/via-plugging-filling-via-drill-vs-via-size/5522 "2026-02-04T11:39:17Z")
Hi, Are standard vias plugged automatically or is there an option to do so? Additionally, the design rules for 4L 35um ENIG states a min via drill size of 0.25mm? So do i need to specify my via hole size in KiCad as 0.2… --- ## [6L board](https://community.aisler.net/t/6l-board/5504)
**Author:** [@David\_84](https://community.aisler.net/u/David_84)\ **Replies:** 4\ **Last updated:** [January 26, 2026, 12:44pm UTC](https://community.aisler.net/t/6l-board/5504 "2026-01-26T12:44:53Z")
Good day, Im happy to know that you add the 6 layer stackup. Do you mind suggest me pls if DK values are fixed or I can adjust it coz I need calculate and design a PCB with some impedance traces. Suggestions are well app… --- ## [Can't proceed with Amazing Assembly](https://community.aisler.net/t/cant-proceed-with-amazing-assembly/5503)
**Author:** [@dmytro](https://community.aisler.net/u/dmytro)\ **Replies:** 2\ **Last updated:** [January 25, 2026, 12:05pm UTC](https://community.aisler.net/t/cant-proceed-with-amazing-assembly/5503 "2026-01-25T12:05:38Z")
I’m trying to order PCB assembly but have an issue. I downloaded my KiCad PCB file. Most of the components got recognized automatically. Some I assigned manually and it seems that everything is OK. But when I try to chec… --- ## [FR4 material datasheet for 4-Layer board](https://community.aisler.net/t/fr4-material-datasheet-for-4-layer-board/5501)
**Author:** [@sliver97](https://community.aisler.net/u/sliver97)\ **Replies:** 1\ **Last updated:** [January 22, 2026, 9:53am UTC](https://community.aisler.net/t/fr4-material-datasheet-for-4-layer-board/5501 "2026-01-22T09:53:07Z")
I need the datasheet for the prepreg material used for 4-Layer 1.6mm boards. This is to complete my safety report for CE/UKCA certification. Thanks! --- ## [Warnings about polarity of SMA connectors](https://community.aisler.net/t/warnings-about-polarity-of-sma-connectors/5483)
**Author:** [@kajwiik](https://community.aisler.net/u/kajwiik)\ **Replies:** 1\ **Last updated:** [January 8, 2026, 12:27pm UTC](https://community.aisler.net/t/warnings-about-polarity-of-sma-connectors/5483 "2026-01-08T12:27:16Z")
I am getting warnings of polarity of SMA connectors (J\*). I checked that the center pin is 1 and GND 2, how to fix this warning? There are also warnings from non-polar small ceramic capacitors. I am using Kicad. --- ## [How to add BOM.csv to order](https://community.aisler.net/t/how-to-add-bom-csv-to-order/5482)
**Author:** [@icho40-gmx-de](https://community.aisler.net/u/icho40-gmx-de)\ **Replies:** 1\ **Last updated:** [January 6, 2026, 2:57pm UTC](https://community.aisler.net/t/how-to-add-bom-csv-to-order/5482 "2026-01-06T14:57:10Z")
Hi, how can i add a BOM.csv from here ? [Next page](https://community.aisler.net/c/help-zone/79.md?page=1)