# 6L+ Layer 35µm ENIG Design Rules

**URL:** <https://community.aisler.net/t/6l-layer-35-m-enig-design-rules/5467>\
**Category:** 🔎 Design Rules\
**Created:** [December 5, 2025, 12:22pm UTC](https://community.aisler.net/t/6l-layer-35-m-enig-design-rules/5467 "2025-12-05T12:22:24Z")\
**Posts on this page:** 1\
**Page:** 1

<div class="post-metadata">

**Author:** ![Manuel-from-AISLER](https://community-cdn.aisler.net/user_avatar/community.aisler.net/manuel-from-aisler/32/184_2.png) [@Manuel-from-AISLER](https://community.aisler.net/u/Manuel-from-AISLER)\
**Post date:** [December 5, 2025, 12:22pm UTC](https://community.aisler.net/t/6l-layer-35-m-enig-design-rules/5467/1 "2025-12-05T12:22:24Z")

</div>

# 6L+ Layer 35µm ENIG

Last Updated: 05/12/2025  
Imperial measures are rounded from metric measurements.  
Valid for 6, 8 and more layers.

### Minimum Copper Features

| | | | | |
| --- | --- | --- | --- | --- |
| **Description** | **Capability** | | | |
| ![min. tracewidth](https://community.aisler.net/uploads/default/original/2X/5/577b38a4947717e9107824f8ce31006bcd856594.png) | min. tracewidth | 100 µm / 4 mil | | |
| ![min. SMD pad size](https://community.aisler.net/uploads/default/original/2X/8/8195b3ffa1ac1d32fd40fd451561730dfb2ae33c.png) | 200 µm / 8 mil | | | |

### Minimum Copper Spacing / Clearance

| | | | | |
| --- | --- | --- | --- | --- |
| ![min. copper spacing](https://community.aisler.net/uploads/default/original/2X/7/7d41e96189b3771f2c57e2e02ef68a9a9f59e4b0.png) | min. spacing copper / copper | 100 µm / 4 mil | | |
| ![min. spacing NPTH_ copper](https://community.aisler.net/uploads/default/original/2X/b/b8a49bda565a145e74a128090bccfcc6f928155b.png) | min. spacing NPTH / copper | 250 μm / 10 mil | | |
| ![min. spacing NPTH Slot copper](https://community.aisler.net/uploads/default/original/2X/6/627eb18479d2038de7f64ec960760349bca6415d.png) | min. spacing NPTH slot \<1.8 mm / copper | 300 μm / 12 mil | | |
| ![min. spacing 1.8 mm Slot _ copper](https://community.aisler.net/uploads/default/original/2X/8/82e816039e51d8f636682aaaef5fcedf23f28741.png) | min. spacing NPTH slot \>= 1.8 mm / copper | 300 μm / 12 mil | | |
| ![Edge clearance](https://community.aisler.net/uploads/default/original/2X/c/ca2715cae3eec765397bd77fb5502402b0c76048.png) | min. copper to edge clearance | 300 μm / 12 mil | | |

### Surface Finish

We use **E** lectroless **N** ickel **I** mmersion **G** old (ENIG), this surface finish offers good surface planarity and high oxidation resistance.

| | | | | |
| --- | --- | --- | --- | --- |
| ![ENIG](https://community.aisler.net/uploads/default/original/2X/5/501961934bcdfd557d4e81834fe61b3581fd5d2b.png) | surface finish | ENIG | | |
| ![ENIG thickness](https://community.aisler.net/uploads/default/original/2X/2/2852abd137ba0265932b6d2aded15a40ac55d307.png) | Nickel thickness   
 Gold thickness | 4.0 µm -7.0 µm   
 0.05 µm -0.1 µm | | |

### PCB Dimension

We accept PCBs within these dimensions for our prototype service, contact our support if your design does not meet these criteria.

| | | | | |
| --- | --- | --- | --- | --- |
| ![min board size](https://community.aisler.net/uploads/default/original/2X/3/3cacbd99a181adedcdee78386a106903039839b8.png) | min. dimension | \>10 mm / \>0.4 in | | |
| ![max pcb size](https://community.aisler.net/uploads/default/original/2X/d/d68d6f7d644ab017b29d2fa7cc5c2492c904289c.png) | max. size | 500 x 500 mm / 19.68 in x 19.68 | | |

### Plated Through Hole (PTH)

All drills with a diameter larger than 0.45 mm are categorized as plated through hole for component mounting, we will enlarge the drill diameter to compensate for the copper plating thickness to ensure that components can be mounted more easily.

| | | | | |
| --- | --- | --- | --- | --- |
| ![min. PTH drill](https://community.aisler.net/uploads/default/original/2X/e/e697bf83d8d5737684206a8e1684b4db265c9048.png) | min. PTH drill size | 0.5 mm / 0.02 in | | |
| ![max. PTH drill](https://community.aisler.net/uploads/default/original/2X/9/91fe40a540d7c998d3f6467779efa21671f767ac.png) | max. PTH drill size | 5.6 mm / 0.22 in | | |
| ![min. annular ring PTH](https://community.aisler.net/uploads/default/original/2X/f/f4f3b290fe8352c81b22febb623a29091c43b5fc.png) | min. PTH annular ring | 300 μm / 12 mil | | |

### Vias

All drills with a diameter up to 0.45 mm are categorized as via drill and will not be subjected to any adjustments by us.

| | | | | |
| --- | --- | --- | --- | --- |
| ![min. via drill](https://community.aisler.net/uploads/default/original/2X/a/a3672e0d1fcd91bf70e12a3b4d567636497a4c86.png) | min. via drill | 0.25 mm / 10 mil | | |
| ![max. via drill](https://community.aisler.net/uploads/default/original/2X/7/78c6cd3b43e42279943f258ba2cd17e21cb3e698.png) | max. via drill | 0.45 mm / 18 mil | | |
| ![min. annular ring via](https://community.aisler.net/uploads/default/original/2X/e/e3267bbb0bda0d4f5bf069ab67bf710ce95676a3.png) | min. via annular ring | 100 μm / 4 mil | | |

### Non Plated Through Hole (NPTH)

| | | | | |
| --- | --- | --- | --- | --- |
| ![min. NPTH drill](https://community.aisler.net/uploads/default/original/2X/c/c5f2c396330d713b9a43b2d1818d1b479369ba72.png) | 0.5 mm / 20mil | | | |
| ![max. NPTH drill](https://community.aisler.net/uploads/default/original/2X/9/93e6626b69952b89c7d7e37d15aa707861cf6748.png) | 5.6 mm / 0.22 in | | | |

### Minimum Drill Spacing

| | | | | |
| --- | --- | --- | --- | --- |
| ![min. drill spacing )](https://community.aisler.net/uploads/default/original/2X/8/8d52c9bdc003622f3208df366658701fde4482da.png) | min. drill spacing | 300 μm / 12 mil | | |

### NPTH Slots

NPTHs Slots that are smaller than 1.8 mm are nibbled. This is a time-intensive process, so we reserve the right to limit the use of nibble slots in a design. Diameters above 1.8 mm will be milled and are thus preferred.

| | | | | |
| --- | --- | --- | --- | --- |
| ![preferred slot diameter](https://community.aisler.net/uploads/default/original/2X/e/e406e831d5a7e59510547c2a5f23b49a4b1ce2c6.png) | preferred NPTH slot diameter | \>= 1.8 mm / 0.07 in | | |
| ![min. NPTH slot diamater](https://community.aisler.net/uploads/default/original/2X/a/a9882e8fdec149ffd93ef11b05f753724e2e65a7.png) | min. NPTH slot diameter | 0.8 mm / 0.032 in | | |
| ![max. NPTH slot diamater](https://community.aisler.net/uploads/default/original/2X/8/89413566c9e2c80188025c71effb384bb3f1bd76.png) | max. NPTH slot diameter | ♾ No restriction | | |

### PTH Slots

| | | | | |
| --- | --- | --- | --- | --- |
| ![min. PTH slot diamater](https://community.aisler.net/uploads/default/original/2X/1/126a2b3c848a991cb2e412e96c9d0ab64de65eba.png) | min. PTH slot diameter | 0.7 mm / 0.028 in | | |
| ![max. PTH slot diamater](https://community.aisler.net/uploads/default/original/2X/2/29a2c125c30064fbf5ae13b68da67e32a5f412a9.png) | max. PTH slot diameter | 2.6 mm / 0.11 in | | |
| ![min. PTH slot annular ring](https://community.aisler.net/uploads/default/original/2X/d/db2685b7bde71205d39d1e04cebbb7aea52c19f6.png) | min. PTH slot annular ring | 300 µm / 12 mil | | |

### Silkscreen

We use Peters SD2692 ink for the silkscreen on our PCBs and apply it using the direct printing method. The smallest supported width is 150 µm / 6 mil, all silkscreen features with a width less of that will be adjusted. Silkscreen printed on pads is not supported, we use openings in the soldermask as reference to cut away / remove the silkscreen in the affected area. Do not use the silkscreen to produce large fillings, designs which cover more than 25% per PCB side will be rejected.

| | | | | |
| --- | --- | --- | --- | --- |
| | | | | |
| ![min. silkscreen text height](https://community.aisler.net/uploads/default/original/2X/2/2d2f6b2f05cae91b393e40e841177dcefc081399.png) | min. silkscreen text height | 800µm / 32 mil | | |
| ![min. spacing silkscreen / pad](https://community.aisler.net/uploads/default/original/2X/5/5430e75613292904bc2480bbca91f67f1460a46f.png) | min. spacing silkscreen / pad | 125 µm / 5 mil | | |
| ![silkscreen on pad](https://community.aisler.net/uploads/default/original/2X/6/611fbc3387bf22f273bc41bcd600b119ef3907cc.png) | silkscreen on pad | not supported | | |
| ![Large Silscreen fillings](https://community.aisler.net/uploads/default/original/2X/c/c3d78475cec131a357ede283da599e611cadfd02.png) | max. Silkscreen | 25% of Board size | | |

### Soldermask

We use high-quality Peters Elpemer AS 2467 SM-DG green soldermask which is well suited for the ENIG finish. Please [refer to our soldermask specification](https://community.aisler.net/t/soldermask-specification/3442) for the electrical properties of the soldermask.

| | | | | |
| --- | --- | --- | --- | --- |
| ![soldermask between pads](https://community.aisler.net/uploads/default/original/2X/2/2f8fe351922cbc47e8d0e4f56838db8db6b1f47a.png) | soldermask dam between pads | recommended but not required | | |
| ![min. soldermask dam ENIG](https://community.aisler.net/uploads/default/original/2X/4/4444b27f39c0a386695e0782b056dcb32fb8c8f3.png) | min. soldermask dam | 100µm / 4 mil | | |
| ![soldermask expansion enig](https://community.aisler.net/uploads/default/original/2X/b/bb3831f31d303cd6d5467a86735688137bf46208.png) | suggested soldermask expansion | 50 µm / 2 mil | | |

### Castellated Edges

We manufacture castellated edges free of charge, [please refer to our documentation on how you can set them up](https://community.aisler.net/t/castellated-edges/48).

| | | | | |
| --- | --- | --- | --- | --- |
| | | | | |
| ![castellated-edges-enig](https://community.aisler.net/uploads/default/original/2X/0/0429d9796419abe3b77f93508e3e0f0d260fc9a7.png) | [Supported](https://community.aisler.net/t/castellated-edges/48) | | | |

### Additional Notes

- Buried, blind, micro or tented vias are not supported
- User-defined subpanels are not allowed, see also [here](https://community.aisler.net/t/ordering-more-than-one-project/83)
