Just to clarify: I am not asking about the bevel, the question will be about pad-to-edge clearance.
So in the PCIe specification (and also in the default KiCAD PCIe edge connector footprint) the clearance between the board edge in the key slot, and the nearest pads (A11, A12, B11, B12) is only 0.2mm. In the manufacturing capabilities of AISLER, the minimum for such clearance is specified as 0.3mm. As a dry-run, I uploaded a PCB file with a PCIe edge connector, and the online design rule checker of AISLER didn’t throw any errors.
So the question: can AISLER do it? Or more to the point, how would it come out? As the pad is 0.7mm wide by default, it wouldn’t be the end of the world if it were reduced by 0.1mm. Should I change to footprint to have 0.6mm wide pads there and 0.3mm clearance, or can I just order as-is, and in the worst case, it will come out with 0.6m pads?
(Also would be great to hear if anybody has tried this already)