At SUFST, we strive to develop innovative custom PCBs to improve the reliability, usability, and capability of our electric race car’s electronics package. One of our major steps forward this season is a new, fully custom driver dashboard. Rather than relying on a bulky, expensive off-the-shelf unit with limited functionality, AISLER’s PCB sponsorship and their 6-layer manufacturing capabilities allowed us to develop a custom TFT screen controller for a 5-inch touchscreen from the ground up.
To drive the screen, we selected the STM32F746ZG - chosen for its dedicated LTDC MIPI-DPI interface and our team’s familiarity with its architecture from our Vehicle Control Unit (VCU). Rather than driving a screen over standard SPI, which limits resolution and results in choppy refresh rates, we utilized a parallel 18-bit interface. Driven by a 25MHz pixel clock, this hardware configuration easily pushes 404,736 pixels at a buttery smooth 60Hz refresh rate, allowing us to display critical telemetry data instantly.
However, this level of display performance introduces a significant data bottleneck. Driving that much data every refresh requires a 1.1MB framebuffer. Because the STM32F746ZG only features 320KB of internal SRAM, we had to integrate an external memory solution. We chose the Winbond W9812G6KH-5 SDRAM chip to act as our dedicated display buffer, routed via the microcontroller’s Flexible Memory Controller (FMC).
Getting an MCU to talk to external SDRAM at high frequencies requires careful attention to signal integrity during the PCB layout process, which is shown in the photo above. To guarantee flawless memory reads and writes, we implemented strict routing constraints:
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Component Proximity: The W9812G6KH-5 is placed as physically close to the STM32 as possible. This minimizes the total trace length, reducing parasitic inductance and capacitance while keeping electromagnetic interference (EMI) emissions to an absolute minimum.
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Impedance Matching: Operating at high clock speeds means the traces act as transmission lines. Thanks to AISLER’s 6-layer stackup, we could utilize dedicated, unbroken inner ground planes directly adjacent to our signal routing layers. This allowed us to tune the trace widths to achieve a controlled 50-ohm single-ended impedance, preventing signal reflections and ringing that would otherwise corrupt the memory data stream.
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Length Matching: You can see the intricate “meandering” or “accordion” trace patterns. Because the FMC communicates with the SDRAM over a parallel bus, all data, address, and clock signals must arrive at their destination within the same time window. By length-matching the traces, we eliminate signal skew, ensuring that the tight setup and hold timing margins of the W9812G6KH-5 are consistently met.
AISLER’s precision manufacturing handled these tight tolerances flawlessly, allowing us to push the boundaries of what our in-house electronics can do on the track.
