Hi everyone,
We’re YTU Racing Formula student team from Istanbul Turkey. We want to share the schematic and the PCB design of a hardware-only Analog Pre-Charge circuit. I recently designed for our Formula Student team’s tractive system.
Since software faults can be catastrophic during the pre-charge sequence, our goal was to keep the MCU entirely out of the loop for the critical voltage comparison and relay triggering phases. We just got the boards manufactured via AISLER, and before sharing the assembled glamor shots, I wanted to discuss the architecture!
Here is the core logic and architecture:
- Strict TS / LV Isolation: The board is strictly divided into the Tractive System (High Voltage) and Low Voltage sides. Power is bridged using SPAN02A isolated DC-DC converters to provide isolated +12V and +5V to the TS side.
- Voltage Sensing & Comparison (TS Side): We use high-value resistor divider networks (arrays of 20k resistors for safety and power dissipation) to scale down the Accumulator (V_BAT) and Inverter Capacitor (V_CAR) voltages to 12V levels. These are fed into an OPA2171 rail to rail op-amp configured as a hysteresis comparator.
- Signal Transmission: Once the capacitor voltage reaches the safe threshold relative to the battery voltage, the comparator triggers the low-side switches, which drive 4N35 optocouplers to pass the “pre-charge complete” signal across the isolation barrier to the LV side.
- Relay Actuation (LV Side): This is where we focused heavily on both reliability and flexibility. By incorporating two different switching topologies on the same board, we significantly expanded our configuration options. We included both TPS4800-Q1 high-side gate drivers and low side N-Channel MOSFETs (SQ2348CES) to drive the Accumulator Isolation Relay (AIR) and Pre-Charge (PC) coils. This approach gives us the flexibility to choose the most suitable driving method during our testing phase, or use them simultaneously for a redundant topology—ensuring that a single point of failure (like a short to ground or short to battery) won’t accidentally actuate the high-voltage contactors.
Why AISLER?
Since this board handles critical signals across an isolation barrier, creepage and clearance are heavily scrutinized by scrutineers. The precision of the solder mask and clean routing we got from AISLER’s manufacturing gives us a lot of confidence in the physical isolation distances on the PCB itself.
Questions for the community:
What are your thoughts on the High-Side + Low-Side redundant relay driving topology? Is it overkill, or do you prefer similar safety margins?
Do you have any favorite alternatives to the 4N35 for HV-to-LV signal isolation that might save some board space without compromising isolation ratings?
Looking forward to your feedback!
Best Regards,
Özgür Deniz Özer