Hello,
the eagle DRC files at aisler-support/eagle/drc at master · AislerHQ/aisler-support · GitHub do not match the technical capabilities given on the Website,
E.g. aisler_e_layer_simple give minimum spacing of 0.175 mm, minimum width of 0.2 mm and minimum drill 0.45 mm. PCB Design Rules tells 0.15/0.2/0.3.
Manufacturer DRC files should match the capabilities.