Preferred Stackup

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1

Hello!

This question is as much for the good people at Aisler as for those using their services. I am wondering what stackup people have been using for the 6L boards, when designing high dencity/high speed boards. With “stackup”, I am referring to how the layers are used, and not the physical attributes of the layers.

My preferred stackup would look something like this:

L1 ----- Signal / Power
L2 ----- Ground

L3 ----- Signal
L4 ----- Ground

L5 ----- Ground
L6 ----- Signal / Power

Note that all signal planes are at least 2W separated and that they all have a close reference plane. This makes routing very easy, without cross talk between the layers, and good EMI handling. As a side note, I like having 0.5oz internal layers to prevent bow and tie effects during reflow. Also, I am not a fan of power planes. Instead, I tend to route power rails/fills like any other signal (in terms of EMI etc). Only extra consideration would be to make the traces/fills wide enough.

Alas, my dream stackup is not supported here. The inner layers are 1oz and the stackup looks more like this:

L1 ----- Signal / Power
L2 ----- Ground

L3 ----- Signal




L4 ----- Signal

L5 ----- Ground
L6 ----- Signal / Power

This is not necessarily bad, just different from what I prefer. Note that layer 3 & 4 have a 0.5mm distance, which would be far enough to allow them to not cause cross talk. However, layer 1 and 3 share the same reference plane. Same with 4 and 6. If routing with this in mind, you end up with four signal layers and two reference planes. At least the inner two layers could be used for high speed signals. Another benefit would be that it is hard to route e.g. 50 ohm traces on the outer layers, because they would need to be so wide that you are not able to create high density boards. On layer 3 and 4, the 50 ohm traces would be thinner, allowing for denser designs. It also makes it easier to manage skew in signal groups, compared to having the signals on the outer layers. However, you would need more vias and there would be stubs on every via.

I still prefer 3+3 signal/reference layers, like I describe above. It’s a safer solution with less cross talk and EMI issues. Nevertheless, I am wondering if anyone could recommend a better stackup than what I have described above, for high density boards. Also, have anyone tried something similar to what I describe above, and how did it turn out? I have not tried this stackup myself, which is why I am asking.

Many thanks in advance for any feedback!

2

Your preferred stackup for our 6L portfolio is the most used one by our customers.

I know about the shortcomings of the stackup, but changing it is not so easy, especially when it is actively used in pooling. And while I understand many wishes from an electronics designer’s perspective, we also have to take care of the manufacturability, availability of materials and many more factors. A smaller distance between the outer and inner layer for overall smaller traces would require the move to one prepreg layer instead of two, which would have an impact on yield. Thinner prepreg also means that we cannot use 1080 fiber weaves anymore, as tighter fiber weave requires a certain height.

3

Many thanks for the quick reply, and for the details.

Just an observation: I had a look at your stackup page again, and notice that it suggest using four signal layers, like I mention above. If this is the recommended use (which I think it should be), then perhaps make a note about that? It’s easy enough to miss, and it can lead to problems.

I’m sure this is more complicated than I know; If it were possible, my wish would be to have a stackup with a thinner center (e.g. 2 x 1080) and thicker cores (0.5mm). That would allow for 0.14mm 50 ohm traces on the inner layers, with good reference planes for all signal layers. Total height would be 1.4mm, just like now. I’m guessing a thicker core would be less expensive, right?

I can see good use for the current stackup, so I would not want the current one to be replaced. An additional stackup would be preferred for me at least.

1 Like
4

Thank you for your feedback.

Thicker cores are actually constructed by fully curing laminate layers, so the thicker, the more material you use. Thus, they are a bit pricier. Prepreg is not fully cured and used as “glue” during manufacturing.

We are considering adding special feature “shuttles” in the future, but we most likely add other products in the beginning because the demand is not as high for 6 Layers as it is for 2 and 4 Layer. But I will keep your feedback in mind.

Btw, did you know that we currently run a 6 Layer discount at the moment? You can use the coupon 6L-Discount to get 20€ off every 6 Layer order until the 20/09/23 . Just thought you might be interested due to your questions about our 6L boards.

5

Good day, the following stackup you mentioned seems a good idea for a 6 layers pcb, as i dont have understood well if you are adding GND VIAS near the signal while changing layer. Are you adding copper pour on signal layers?

L1 ----- Signal / Power
L2 ----- Ground

L3 ----- Signal
L4 ----- Ground

L5 ----- Ground
L6 ----- Signal / Power

6

Whenever you change the reference plane, you will need to add a GND via for the return current.
You can add GND on signal layers but need to take care as it can impact the impedance.

7

okay so as I’ve understood it’s better no add another gnd plane on signal inner layers

8

Just to be clear; the suggested stackup above would perform poorly with aisler 6L because of the used layer thickneses. I would strongly recomend against using it. You need thinner dialctrics for controlled impedance, and.better control of cross talk. A better stackup is illustrated on the stackup page.

Regarding adding vias, I would try not to route beween signal layers. If i do then I would add vias for the transiton. With the “better” layout, using four signal layers and two reference planes, there would be other more important factors to consider.

Regarding fills/pours; there is no unoversal answer here., as you probably already know. In general though, I would never use copper pours unless there is a clear reason for it. Such reasons could be co planar signals, copper balance or current requirements.

9

I absolutly agree. There are a few exceptions, as I understand. If you use a power plane as reference then the return current will flow through nearest cap… You would not not need extra via in that case.

10

Okay, As im designing a flight controller due the high density about components and traces what kind of 6 layer stackup do you suggest?

Many traces i will route are for SPI and serials and maybe canbus, so i think I must put some traces on inner signal layers as someone components are also on the bottom.

Regards

11

Please note that I would not consider myself to be an expert on these matters.
Nevertheless, I would not put signal traces on the inner layers, with a stackup like this.

The 6L stackup looks like this:

Note the extra distance between some of the layers. With this in mind, I would put higher speed signals on the outer layers only, e.g. your canbus and spi. They are the only layers that are close enough to a reference plane to give you good impedance control. However, you would need to make sure you do not route any signals on L3 and L4 such that they are parallel to your high speed signals. They may pick up cross talk if you do. Even crossings signals on L1 and L3 can cause cross talk. This means that you can only really route high speed signals on two layers, and those signals would need to use something like 0.245mm for a 50ohm impedance signal. A canbus (120ohm diff signals) with 3W spacing would probably need something like 1mm space or more (I haven’t checked it). It’s more space that what you can do with other stackups. Then again, this might be perfect for you, considering the price of the board.

12

Hello…, thank you for your info, doing some checks I’ve personally choose follow this stackup that seems a good option coz maybe on layer 3 i can put some i2c lines and serial lines as they are not considered high speed lines… my point is also if i must add copper pour in this layer with those lines…
L1 ----- Signal / Power
L2 ----- Ground

L3 ----- Signal
L4 ----- Ground

L5 ----- Ground
L6 ----- Signal / Power

13

Using pours (coplanar signals) could work, but I suspect it will not. Too many pitfalls with that, so I would stay away from such solution. In any case L4 would be useless as a reference plane because of the distance to L3. Use L4 for power or signals instead.

Slow signals should work, like I2C and UART. Just make sure you slow down the rise time on those signals.

Good luck with your project!

14

So i must exlude L3 layer and point for slow signals on L4 Groundplane with some traces and jump to L6 keeping intact L5 as GND reference plane…correct?