Quasi castellated pads to achieve partial board edge metallization?

datenwolf · March 3, 2025, 2:27pm

I was wondering if one could use the rules for generating castellated edges to achieve partial metallization of a boards edges. Specifically I’m interested in mounting edge-launched SMA connected inset into the board, making the solder flow into the gap between the connector and the board.

Following the rules laid out in Castellated edges I came up with something in KiCad that renders in the KiCad 3D viewer as following:

In the Aisler PCB viewer the board is processed without reporting warnings or errors and rendered as

But I wonder if this can actually be manufactured without problems. How viable is this?

Thea · March 14, 2025, 11:56am

Hi @datenwolf ,

Some Members of your community did something similar successfully already.
(Back then on our 6 Layer Pool, which we discontinued since) but from a mechanical manufacturing standpoint It’s still the same.

But please note that this method is still a bit “hacky” and there may be some copper burrs you have to clean off manually.

You can find their example board in this Gitub repository.

datenwolf · April 24, 2025, 9:38am

Just a quick followup on the project: Using the SMA edge launch footprint I created I ordered a board at Aisler. This is the result:

It came out beautiful!